Intel Training Workshop, Parallel programming and optimisation for Intel architecture

Date
30 November 2016 to 1 December 2016 - 09:00-17:00

All of our events may be recorded and shared via the University of Sheffield Kaltura platform so those who cannot attend may still benefit. We will consider your attendance implicit consent to this.

Intel Training Workshop (Parallel programming and optimisation for Intel architectures). This workshop comprised two half-day sessions that showed students how to program multicore (e.g. Xeon) and massively multicore (e.g. Xeon Phi) computers using C++. /training/intel/